@m@NIEq aka Wiedzmin_,
post #1
| 750CXe | 750FX
-----------------------------|------------------------|-------------------------
Frequency | 500 - 700 MHz | 700 MHz ? 1 GHz
L2 size | 256 KB | 512 KB
BAT registers | 4 I, 4 D | 8 I, 8 D
L1 d-cache access | Hit under miss | Miss under miss
Bus frequency | Up to 133 MHz | Up to 200 MHz
PLLs | 1 | 2
Bus pipelining | partial | full
Error checking | ECC on L2 array | ECC on L2 array
| | Parity on L2, L1 tags
| | Parity on L1 arrays
| | Parity on 60x bus
L2 cache locking | --- | By way
...dla leniuchow